1. Field of the Invention
The present invention relates to a static semiconductor memory device, and more particularly, to the improvement of a static memory cell of a static random access memory (SRAM) device.
2. Description of the Related Art
A prior art SRAM cell is constructed by a flip-flop formed by cross-coupled first and second inverters and transfer transistors connected between first and second nodes of the flip-flop and data lines. That is, the first inverter is formed by a first load resistor between a power supply line and the first node and a drive MOS transistor between the first node and a ground line. Similarly, the second inverter is formed by a second load resistor element between the power supply line and the second node and a second drive MOS transistor between the second node and the ground line.
In the above-described prior art SRAM cell, however, since the data lines cross over at least one of the power supply line and the ground line, the parasitic capacitances of the data lines are increased, which decreases the access speed of the SRAM cell. This will be explained later in detail.